Electronic frequency discriminator circuit



March 4, 1958 c. MOORE 2,825,807

ELECTRONIC FREQUENCY DISCRIMINATOR CIRCUIT Fil'ed Nov. 29, 1954 4 Shets-Sheet 1 mpur 5/ 0/91. 50mm :4

v 55 aa A 1 l 32 \l I 1 a IN VEN TOR. ROBZET C. 0700/?5 HGEDTS R. C. MOORE March 4, 1958 ELECTRONIC FREQUENCY DISCRIMINATOR CIRCUIT Filed Nov. 29, 1954 4 Sheets-Sheet 2 //7PUT [Ts/awn sou/ace 33 INVENTOR. ROBRT C. moms March 4, 1958 ELECTRONIC FREQUENCY DISCRIMINATOR CIRCUIT Filed NOV. 29, 1954 R. C. MOORE mPur .s/qnm 50am:

4 Shets-Sheet 3 INVENTOR. RUYBERT c. mama:

QWQ

March 4, 1958 R. c. MOORE 2,325,807

ELECTRONIC FREQUENCY DISCRIMINATOR CIRCUIT Filed Nov. 29, 1954 4 Sheets-Sheet 4 F/Ljzll.

.67; 5a 6 6.4 \e: l

1 megficyczss l INVENTOR.

ROBERT 6'. 0700/?6 HGEUTS United States patgflt f) c ELECTRONIC? FREQUENCY. DISCRD/HNATQR CIRCUIT Robert C. Moore,-Erdenheim, Pa assign-or toPhilco -Corporation, Philadelphia la sylvania .Application November 29, 1954,;Serial No. 471,567 13' Claims. (Cl; 250-27) a corporation. of Penn- "This invention'relates generally to frequencyvaria'tion detectors and more-specifically toja frequency discriminatorhaving the ability to detect-frequency variation -over anunusually wide bandwidth.

In 1.11%,P1l0r'31'tth61'6 are many'types offrequeney discriminators'having varying characteristics and adapted to function efficiently in many different applications.

Usually,in' frequency discriminators, steepnessof slope of the characteristic curve is desirable.

However, this ordinarilycanbe obtained only at the expense of decreasing the 'peak-to-peak bandwidth, which decreases the operable bandwidth. It is .desirable in some applications,

where the'frequency might deviate beyond the upper or lowerfrequency peaks; to have a frequency discriminator that notonly has .a steep slope at crossover, butalso'has skirts or ,trailing edges that extend well beyond the upper and. lower peak frequencies to encompassa much larger frequency bandwidth than do the prior art discriminators. One such application is in a type. ofcolor television receiver utilizing parallel phosphor .stripes cmis'sive of'different colored'li'ght on the screen .of;-.a cathode ray tube, and wherein the scanning rate..,of-the electron beam of the cathoderay tubeinthe direction transverse to the phosphor stripes must-be. kept constant withincertain'limits since theintensity of the beamat a given time determines the intensity .of a given color.

The rate of scanning is determined by complex circuitry and is controlled by'an indexing signal which. is generated by the electron beam passing over a seriesof high secondary electron emission strips of material, .posi- 'tioned parallel to the phosphor stripes and at regular intervals on the screen of the cathode raytube. When the receiver is initially energized, the scanning frequencymay have sufficient deviation. so that. the index frequencyds beyond the .upper1or lower frequency peaks-ofthefrequency discriminator which monitors the indexfrequency. A frequency discriminator having a characteristic .curve with skirts of a substantial value over a relatively wide frequency bandable to detect such .a deviationandsalso the directionof deviation would mark adefiniteimprove ment inthe art.

An object of the invention is-to provide a=frequency discriminatorhaving a characteristic curve thatexhibits .trailingedges of substantial value over widefrequency ranges on either side of the steep slope portion of thediscriminator characteristic curve defined by the .hi'ghan'd low. frequency peaks.

Another object *ofitheinven'tionis to providea frequency discriminator-adapted to detectdeviations over 7.8 wider-range of frequencies than has heretofore beendone,

andfurther having a steep slope of substantial linearity between high and low frequency peaks extendingovera frequency bandwidth which compares favorably with' the priorart frequency discriminators.

-A further object of the invention is: the improvement of-frequency discriminators generally.

'In? accordance with 'a' general concept of 'the invcntion,

across said second phase'shifting means.

.at .thesamepolnt .and combine to form ZDUC. voltage. tereate'dby the .changingot amplitudes ofthe two mutual- 2,825,8fi'? Patented Mar. 4, 1953 ice there-is provided a first phase shifting means constructed to produce two mutually phase displaced output signals in-response-toan input signal, and a=second phase shiftingrneans constructed and arranged to be I6SPOHS1VE'TO the same inputsignal to-produce 'a third-signal whose phase varies in response to variations in the frequency of said input signal between limits correspondingto the saidmutually phase-displaced signals. Means for detecting the amplitudeot the-dinersaid mutually phase-displaced outare provided ence between one of put'signals and thesignal across said second phase'shift- -ing' means,- and further means are provided'fordetecting .signals will varyin-differentamounts'for a -given change .in input signal frequency to, produce a. varying D. .C. signal, independently or they phase shift of the signal .across .said second phase shifting means, by meansof the twodetecting means and. the comparing circuit means .mentioned hereinbefore. "The two. D. C.vo,ltages appear one. resultant Itis tobe noted that the. D...C. voltage .ly phase displacedoutput signals is effective over a considerably wider frequency bandwidth .than is .the v,D. .C. voltage created by the changing phase-of the voltage :signabacross the second phase. shifting means,.thus producing .a characteristic curve ,thatthas long trailers on either. side, of the. frequency peaks.

A. furtherfeature of theinvention is. that the combined -.-action:.,of .thejirst .phase shifting means -.-and the second phase shifting means produce a characteristic .curve. having 1 a substantiallylinear. steepslope between peak fre- ..que.ncies randeextencling over .bandwidth.

a relatively wide frequency it -.is .to be noted that 1 thesard zsecond phase shifting .means canbe-a-tuned circuit, *or,.in general, any type .cir-

.cuittwhich inresponse to :an inputsignal willproduce 1a signal thereacross whose phase varies in accordance with variationsinthe frequency of the input-signal.

These and. other objects. and. features ,of .theinvention z..w.ill, be. more fully. understood. from. the. following :detailed description thereof when read in. conjunction -.with the drawings irrwhich:

Fig.4 isaschematic sketchof'oneembodiment of the invention;

'Fig. 2' is avector diagram showingthe various voltages .in vectorformat av frequency identifiedas center .operatingffrequency which is defined .hereinafterand alsoat afrequency above .center operating frequency;

Fig. .3 .is .a-Nector diagram showing: the various volt- .ages: in vector. form at center operating frequency, and

--also at 1a. frequency below center .operating frequeney;

ZFig. "4 'showsnthezcharacteristicrcurve of the circuit of .Fig. 1;

Fig. '5 is aschematicsketch: of anothepspecies' of the invention;

Fig die-a vectordiagram-of voltages-at various points of the circuit of Fig. v also at a frequency above center operating frequency; Fig. 7 is a vector diagram of voltages at various points of the circuit of Fig. 5 at center operating frequency and also at a frequency below center operating frequency; Fig. 8 shows the characteristic curve of the circuitof Fig. 5;

ass mo? at center operating frequency and v V Fig. 9 is a schematicsketch of the third species of the invention; 5

Fig. 10 is a vector diagram showing the voltages at variouspointsof the circuit of Fig. 9 at center. operating frequency and also at a frequency above center operating frequency;

Fig. 11 is a vector diagram showing the voltages at v I various points of the circuit of Fig. 9 at center operating frequency and also at a frequency below center operating frequency;

Fig. 12 shows the characteristic curve of the'circuit of Fig. 9; and

i Fig. 13 shows the frequency response curves of certain .portions of the circuit of Fig. 9.

Referring now to Fig. 1,'the' input signal source is constructed to generate a signal which may vary in frequency above and below a nominal frequency herein defined as center operating frequency. Input signal source 20 is connected to the control grid 23 of the" vacuum tube 22 through coupling capacitor 21. The cathode 24 of tube 22 is connected to the junction 25. The plate 26 is connected to plate battery source 27 through resistor 28. The signal impressed upon the junction '25 from the tube 22 is fed into three circuits. The first of these circuits is comprised of resistor 29 and the variable inductor 30 which function to produce a signal at point leading the appliedsignal in phase, at center operating frequency, by an amount which, in this particular embodiment of the invention, is about 60. The second circuit is'comprised of resistor 31'and the capacitor 32 which function to lagging the applied signal in phase, at center operating frequency, by about 60. The lagging and leading'signals at the points 35 and 36 respectively are of substantially the same amplitude. Thirdly, the signal at the junction produce a voltage signal at point 36 25 is applied through the resistance 37 to the tuned circuit 48 comprised of variable and capacitor 39. The tuned'circuit 48 is tuned to cen- "ter operating frequency which in this embodiment of the invention is 6.7'megacycles. Capacitor 40 and diode 41 form a circuit means connecting the point 35 to the output of the tuned circuit 48 designated as point 87. Similarly, capacitor 42 and diode 43 form a circuit whereby the point 36 is connected to the tuned circuit 48. Since the capacitors 40- and 42 are relatively large, the voltage acrossthe diodes 41 -and'43 will be substantially the potential difference between points 35 and-87, and points 36 and 87 respectively. At center operating frequency the voltage at point 87 has a phase midway between the phases of the voltages at points 35 and 36 so that the voltages across the diodes 41 and 43 are equal at center opa crating. frequency. The resistors cuit means whereby the D. C. voltages appearing across the diodes 41 and 43 arecombined to produce a resultant unilateral voltage at point 90 which is proportional to the difference between the voltages across the diodes 41 and Q43 and which varies in amplitude in accordance with variations in the frequency of the signal from the'input signal source '20. The capacitor 47"forms a return path the resistperforms the function of magnetic core inductor 38 l 44 and 45 form a cirmaintaining a reasonably constant D. C.'potential at point 90 forany given frequency of input signal; The loads 33 and 34 represent any suitable external loads for the output terminals of the phase shift circuitry.. It is to be understoodthat a suitable external'load mustnecessarily be a high impedance load since a low lnpedansfergf Age uqu s pa e i ly il ssenthe .ampl mde- ,f .sa

also the phase displacement between, the voltages existing at points 35 and 36. This would result in a smaller output signal at the point, 90. The loads 33 and 34 of Fig. 5 must also be high impedances for the same reasons.

In a preferred embodiment of the invention the circuit constants may be as'follows. Resistors 29, 31, 37, 44, 45 and 28 may have values of 1,000, 1,000, 10,000, 470,000, 470,000 and 330 ohms respectively. Capacitors 40, 42, 47 may have values of .01, .01 and .07 microfarad respectively and capacitors 32, 39 and 21 may have values of 20, 100 and 1,000 micromicrofarads, respectively. Variable inductors 30 and 38 may have values of from 10 to 20 microhenries and from 6 to 10 microhenries respectively. The diodes 41 and 43 may be of the 6AL5 double diode type. Other types having suitable characteristics also may be used. The battery source 27 is a positive 250 volts. Triode22 may be of the type 1 2AV7. Other tubes having suitable characteristics also may be used. The frequency bandwidth over which this circuit 'is'operable is from about 4 megacycles to about 10 megacycles, with a center frequency of 6.7 megacycles. The load circuit 46 may be any desired suitable load.

The operation of the circuit of Fig. 1 will now be described. Assume that the frequency of the signal applied to point 25 from source 20 is 6.7 megacycles at which tuned circuit 48 is resonant.

Under those 'conditionsthe vector E in Fig. 2 represents the voltage at point 25 of Fig. ,1 with respect to ground potential, the vector E the voltage at point 87 with respect to ground potential, the vector E the voltage at the point 35 with respect to ground potential, and the vector E the voltage at the point 36 with respect to ground potential. As' was described earlier, the voltages E and E respectively lead and lag the applied voltage E by equal amounts at center operating frequency and further have equal'amplitudes. Consequently, the result ant voltage difference between E and E37, represented by vector E of Fig. 2, is the same as the resultant voltage difference between E and E represented by the vector E Substantially all of the voltage (B -E3 is applied across the diode 43 and, substantially all of the voltage (E E )Qis applied across the diode 41 since the blocking capacitors 42 and 40 are large. Since the alternating currents flowing through the capacitors 40 and 42 are the same in amplitude, the D. C. potentials built up across the capacitors 40 and 42 due to the actions of the diodes 41 and 43 have the same absolute magnitudes with respect to ground potential although of different polarities. It is to be noted that D. C. potentials other than those created by the action of the diodes 41 and 43 exist across the capacitors 40 and 42. These D. C. potentials are derived from the plate supply'of the tube shown in the circuit. However, these D. C. potentials do not adversely affect the operation of the circuit, inasmuch as they do not change the potential of the capacitor plates whichare connected to the diodes '41 and '43. The potentials of these plates is determined by the action of the diodes 41 and 43 on the alternating voltage applied thereacross. Consequently, when the potentials existing across the capacitors 40 and 42 of Fig. 1, or the corresponding capacitors of the other circuits described herein are referred to, the reference is confined to those 'D'. C. voltages caused by the action of the diodes 41 and 43 of Fig. 1 or the corresponding diodes of the other circu'its shown herein, unless otherwise specifically stated. 'Returning again to Fig. 1, the D. C. potential on capacitor 40 is of a positive polarity, and the D. C. potential on capacitor 42 is of a negative polarity. Thus, a D. C. current path may .be traced from point 88 through the resistors 44 and 45, point 89, and through the diodes 43 .-and 41 back to point 88. Since resistors 44 and 45,,are equal, the D. C. potential at point 90 is midway between the potentials of points 88 and 8 9which, at center operat- 7 double tuned circuit. The primary portion of the double tuned circuit, including winding .55, capacitor 56, and stray-capactance 66, is tuned to a frequency above center operating frequency so that at center operating frequency the circuit is inductive in nature. Similarly, the tuned circuit 71, comprised of capacitor 73 and variable magnetic core inductor 72, is tuned to a frequency above center operating frequency so that at center operating frequency the circuit is inductive in nature. The capacitor 95, however, supplies capacitive reactance to both the primary portion of the double tuned circuit and also to the tuned circuit 71 so that the overall impedance to the constant current input source represented by the pentode 60 is resistive in nature at center operating frequency. This will be understood more fully from the description of the operation thereof set forth hereinafter. The input signal source 59 is connected to the control grid 61 of the pentode 60. The plate 62 of the pentode 60 is connected directly to the primary portion of the phase shift circuit, and is connected to the tuned circuit 71 through the capacitor 95. Battery 81 forms a biasing means for screen grid 83. Suppressor grid 84 is connected to the cathode 85, which in turn is connected to ground through the parallel combination of resistor 82 and capacitor 114.

The circuit constants are so selected that, at center operating frequency, the voltage signal at point 64 is about 180 out of phase with the voltage signal at the point 106. As will be seen more clearly later herein, the voltage at point 107 at center operating frequency leads the voltage at point 106 by 90. Capacitor 67 and diode 68 form a circuit connecting the point 64 to the common terminal 107 of tuned circuit 71.

The difference between the voltage signal at point 64 and that at point 107 will cause the blocking capacitor 67 to acquire a positive charge due to the asymmetrical nature of the diode 68. Capacitor 69 and the diode 70 form a circuit connecting the point 106 to the common terminal 107 of the tuned circuit 71. The difference in potential between the voltage signal at'point 106 and that at point 107 will cause the blocking capacitor 69 to acquire a negative charge due to the asymmetrical nature of the diode 70.

At-center operating frequency the values of D. C. potentials created across the capacitors 67 and 69 due to the action of the diodes 68 and 70 will be equal although of different polarity. Consequently, the two equal re sisters 74 and 75, which are connected across the diodes 68 and 70, will divide the voltage on the capacitors equally so that point the D. C. charges on the capacitors 67 and 69 are unequal as a result of a frequency deviation from center operating frequency, the potential of the point 99 will be intermediate the D. C. potentials on capacitors 67 and 69. However, by reason of the current drawn by the output load 110, which is a high resistance compared to the resistors 74 or 75, the potential of point 99 will not be exactly midway between the potentials of capacitors 67 and 69.

The capacitor 79 performs the function of removing the A. C. components from the potential at point 99. Since the capacitor 79 discharge time is relatively long compared to the period of the input signal, a substantially constant D. C. voltage will existat the point 99 when there are unbalanced voltages across the diodes 68 and 70. The polarity and magnitude of this D. C. voltage are representative respectively of the sense and magnitude of deviation of the frequency of the input signal from center operating frequency (within a certain bandwidth).

A typical set of circuit constants for this embodiment of the invention isas follows: Resistors 57, 74,75, 110 and 82 have valuesof 10,000, 47,000, 47,000, 220,000 and 180 ohms respectively; variable inductors 54 and 55 each have values of from 25 to 50 microhenries; variable inductor 72 has a value of from 6 to 10 microhenries;

99 will be at ground potential. If

and capacitors 65, 66, 67, 69, 56, 73, 79 and 114 have values of 3, 7, 2000, 2000, 5, 68, 2000, and 10,000 micromicrofarads respectively. Batteries 81 and 58 are each volt sources. Diodes 68 and 70 may be the same as' the diodes 41 and'43 of Fig. 1. Pentode 60 may be of the type 6CB6.

The operation of the circuit of Fig. 9 now will be described in detail. Assume the pentode 60 to be a constant current source and that the total plate current thereof is represented by the vector 1,, of Fig. 10. At center op erating frequency the plate current I sees a resistive load since the components of the circuit have been chosen so that, at this frequency, their net reactance is zero. Therefore, the potential at junction 106 of Fig. 9 is in phase with the plate current I The primary portion of the double tuned circuit, which includes winding 55, capacitor 56 and stray capacitance 66, is not tuned to resonance at center operating frequency.

Similarly, the parallel tuned circuit 71, including inductor 72 and capacitor 73, is not tuned to center operating frequency. However, both the primary portion of the double tuned circuit and the tuned circuit 71, in conjunction with the capacitor 69, form a circuit which presents a non-reactive impedance to the plate current I As can be seen from Fig. 9, the current I divides at point 106 and a first portion flows to the primary of the double tuned circuit and a second portion flows into the tuned circuit 71. The current flow into the primary portion of the double tuned circuit, which is represented by the vector I of Fig. 10, is inductive in nature at center operating frequency and lags the voltage E Since the total current flow must equal I the current flow into the point 107 is a quantity represented by the vector I Further, since at center operating frequency the circuit 71 is inductive in nature, the voltage thereacross will lead the current and is represented by the vec-, tor E which, it will be noted, leads the voltage at point 106 of Fig. 9 by 90. The voltage at point 64 is rep-' resented by vector E and is about out of phase with the voltage at point 106 of Fig. 9.

Vectors E and E represent the voltages across the diodes 68 and 70 respectively. It can be seen that these voltages are of equal amplitude and, consequently, the potentials existing across the blocking capacitors 67 and 69 due to the action of the diodes 68 and 70 will be equal in magnitude and opposite in polarity. Since resistances 74 and 75 are equal, point 99 will be at ground potential. If the frequency of the input signal increases above center operating frequency, the overall impedance presented to the input current I becomes capacitive so as to lead the voltage at point 106. This new voltage is represented by the vector E' Further, due to the increase in frequency, the primary portion of the double-tuned circuit becomes lessinductive so that the new current therethrough, represented the voltage E' as much as at center operating frequency. The new current vector 1 107 is determined by the current vector I' and, as can be seen from Fig. 10, is rotated in a clockwise direction.- The voltage at point 107 also rotates in a clockwise direction since the tuned circuit 71 becomes less inductive With the increased frequency, so that the phase angle between the current I' and E decreases. The voltage at point 64 of Fig. 9 changes 7 phase but not as much as the voltage at point 106, due

largely to the difierence in values of the capacitors 65 and 66 which produce different shaped frequency response curves, as can be seen from Fig. 13, wherein curve 106A represents the response at point 106 and curve 64A represents the response at point 64. The difierence between voltages E and E' represented by the vectorE' of Fig. 10, is the voltage across the diode 70, and the difference between voltage E' and E' represented by the vector E' is the voltage across the diode 68 of Fig; 9. It can be seen that the voltageEf is larger than the by the vector I' does not lag greater value.

seas-s07 voltage E Consequently, due to the efi ect of the-diodes 68 and -70,'there will exist across the-capacitor 67 a positive potential-having an absolute value larger'than the absolute value of thenegative potential'existing across the capacitor '69. This will result in a'positive D.-C. potential-at-the junction 99, sinceresistors 74 and 75 are equal. -As 'in the previously described embodiments of the invention, this'potential is indicativeof the magnitude and sense of thedeparture-of the frequency of the input signal.

If the frequency of the input signal fromsource 59 decreases below center operating frequency, the voltages at variouspoints in the circuit will -vary .inaccordance withthevector diagram of Fig. 11, wherein vectors E E and-E -represent the voltages at1points'106,10'7 and -64 respectively of Fig. 9 at and whereinthe vectors E51 E 107 and 'E" represent the voltages at points 1%, 107 and respectively of Pig. 9"at a frequency below center operating frequency. Vector 1 represents 1 the current flow from point 106 into the primary portion of'the doubledunedcircuit, and

vector I re'p'resents the current flow into the point 197 When the 'frequency'decreases below center operating freqiltencypthe circuit becomes inductive so'that the input current 1 lagsthewoltage at point 106 which is repres'ented bv'the vector E the primary p'ortion of" the double-tuned circuit from the terminal-1496 increases its lagging phase angle with the voltage E305 and is represented by the vector F The new -current flow into point 107 of Fig. '9 is represented by' the vector 1H1, which rent-flowl I The phase angle between the current I" -and'E is increased because of the increased inductiveness'of the circuit. The voltage E leads the voltage E Theresultant voltages EH70 and E that exist across the 'diodes 7tl -and 68' respectively of Fig. 9, can be seen"'-to have 'unequal values with 'E- "having the Consequently, the voltage across diode 170 of Fig. 9 'v'vi ll'be greater than the voltage'acrossthe diode 68. Thus' theabso'lute value of the negative D. C. voltage on theblocking'capacitor' 69 willbe greater than the absolute valueof the positive D. C. voltage on the capacitor 67, so that the terminal '99 'will'h'ave a negativevoltage thereon.

It is to be noted that when the frequency decreases below'center' operating frequency, the voltage'at point 64 of Fig. 9decr'ea'ses at a faster rate than -does the volta'ge'of point 166. This characteristic produces a negative polarity trailing edge on the characteristic curve of the circuit of Fig. 9' as can be seen from Fig. 12, wherein the curve 115 represents the D. C. voltage that is present on the 't'erminal99 in Fig. 9, due to the change in-amplitudes of thevoltage' vectors E and E wherein the curve 117 represents the D. C. voltage that would be present. on the terminal 99 due to the rotation of the vector E and wherein the curve 116 representsthe overall characteristic of the circuit. Similarly, a positive trailing edge is produced when the frequency increases above center operating frequency. This is due to the fact that the voltage vector E rotates more in a-clockwise direction than-does the voltage vector E 'as can be seen from Fig. 10, to produce a difference in amplitudes. The above mentioned characteristics can be more readily understood from the frequency response curves of Fig. 13 wherein it can be-seen that for a given change of frequency the amplitudes of the voltages at points-64 and-106 will vary in different amounts.

It is tobe noted that the preferred embodiments of the invention described in detail herein show either a parallel tuned circuit or aseries tuned circuit which, in response to an applied input signal, will produce a signal thereacross who'se phase will vary inaccordance with variations of the frequency of the input signal. Other forms of phase shifting circuits also will perform this function in a satisfactory manner. Consequently, the invention is not to be limited to the use of tuned circuits. Further,

center operating frequency,

The current-flowing into leads the center operating cur-.

various other change maybemade in circuits-constants and circuit arrangements without departing lfrom'thezspirit or. scope .of the invention.

'1 claim: 1. In a frequency discriminator circuit, a first-phase shifting means responsive to an inputsignal to produce mutually..phase-displaced outputsignals-whosephases vary in accordance with variations in frequency of-said input s gnal, a second.phase..shifting means-.consn'ucted;to.be

signal equal to the difierence between :the :other output signal from said firstgphase I shifting-means :and the-signal produced acrosssa'rdsecond phase shifting means, means for separately detecting .the amplitudes :of5sai'tl derived signals, and means for. combiningsaiddetected signalsto produce .a D. C. signal whose :arnplitude varies in-accordance' with variations: in the. frequency :of. said input s gnal.

2. I n a frequency discriminator:circuit,:-a first-phase shifting means responsive to-antinputvsignal .to produce mutuallyphase-displaced output signals whoseamplitudes vary in different-amounts with any, given deviation of frequency of said input signah-a second phasershifting: means constructed -to be responsive to said signal applied thereto to producea. third signal across saidsecond phaseshifting means Whose phase varies in accordance with 'variationsin the a frequency .of said input signal, ;means :for .;applying said signal to saidi firstvphase shifting means and to:said second phase shifting means, means for ;derivingsaa:signal equal to the difference between one of the output signals :ofsaid. first phase shifting. means andithe-signaliproduced across said second phase shifting means,. meansrzfor derivmg another signal equal to ,the diiference 1' between the other output signal. of saidufirst phase: shifting meanswand the signal :produced across said second :phaser'shifting means, meanslfor. separately'idetectingthe amplitudes-of sa1d.:derived' signals, andi'means" for combining said detected signals to produce-a D; C: signal whose amplitude varies in accordance with variations in the frequency' of said'input signal.

3. In a' frequency discriminator circuit, a phase shifting network responsive to an input signal to produce mutually phase-displaced output signals whose phases vary in-accordance'with variations in frequency of saidinput signal, a'tuned circuit, means for-'applying'said signal to said phase shifting network and to said tuned circuit to produce across said tuned circuit a..thirdsignal corresponding to said input-'- signal but whose" phase varies in-accordance withvariations in the frequency'of said input signal, means for deriving a signal equal to the difference" between one of the output signals from said phase shifting networkand the signal-producedacross said tuned circuit, means for-derivinga second signal equal to the: difference between the other'output 'signalfrom saidphase shifting etworlr andthe signal-produced across said tuned circuit, means for separately detecting the amplitudes" of said derived signals," and-means for combiningsaid detected signals to produce a unidirectional 'signal'whose amplitude varies'in accordance'with'variations in the frequency of said input signal.

4. Inia frequency discriminator circuit,.a'phase1shif ting network responsive to an'irrput signal to producemutually phase-displaced output signals whose amplitudes vary 'in different amounts With any given deviation of frequency of said input signal, a tuned circuit, means for applying said signal to said phase shifting network and to said tuned circuit to produce across said tuned circuit a signal cor- :accordance with variations in .in accordance with variations in frequency of sad 11 responding to said input signal but whose phase varies in the frequency of said input signal, means for deriving a first signal equal to the difference between one of the output signals from said phase shifting network and the signal produced across said tuned circuit, means for deriving a second signal equal to the difference between the other output signal from said phase :shifting network and the signal produced across said tuned .circuit, means for separately detecting the amplitudes of said derived signals, and means for combining said detected signals to produce a D. C. signal whose amplitude varies in accordance with variations in the frequency of said input signal.

5. In a frequency discriminator, means including a tuned circuit responsive to an input signal to produce across :said tuned circuit a signal whose phase varies in response to variations in the frequency of input signal, a phase shifting network comprising a first output means and a second output means and arranged to be responsive to v said input signal to produce at said first and second output means mutually phase-displaced signals whose phases vary input signal and which respectively lead and lag by substantially equal amounts the signal produced across said tuned circuit when the frequency of said input signal is substantially equal to the resonant frequency of said tuned circuit, means for applying said input signal to said first-named means and to said phase shifting network, means comprising a first detector means connecting said first output means to the said tuned circuit, means comprising a second detector means connecting said second output means toxsaid tuned circuit, and circuit means connected across said first and second detector means, said circuit means lbeing constructed and arranged to combine the signals "appearing across said first and second detector means to produce a D. C. signal whoseamplitude varies in accordance with changes in frequency of the said input :signal.

6. A frequency discriminator in accordance with claim 5 :in which said first detector means comprises a first diode and a first capacitor means and in which said second .detector means comprises a second diode and a second -capacitor means, the anode of said first diode being connected to the cathode of said second diode.

. 7. A frequency discriminator in accordance with claim 5 in which said tuned circuit comprises a parallel tuned circuit.

8. A frequency discriminator in accordance with claim S-in which said tuned circuit comprises a series tuned circuit.

.9. In a frequency variation detecting circuit, a first phase shifting means constructed to be responsive to an applied input signal to produce a first signal thereacross whose phase varies in accordance with variations in the frequency of the applied input signal, a second phase shifting means having a first output means and a second output means, said second phase shifting means being constructed when energized by said input signal to produce a :second signal at said first output means which leads the signal across said first phase shifting means and to produce a third signal at said second output means which 'lags the signal across said first phase shifting means, the second phase shifting means being further constructed to cause the amplitude of said second signal to become less with respect to the amplitude of said third signal when the equency of the input signal decreases and to cause the :amplitude of said third signal to become less with respect to the amplitude of said second signal when the frequency of the input signal increases, means for applying said input signal to said first phase shifting means and said second phase shifting means, means designed to detect the amplia second diode connected tude of the difference between the signal at said first output means and the signal across said first phase shifting means, means designed to detect the amplitude of the difference between the signal at said second output means and the signal across said first phase shifting means, and means constructed to combine the detected signals to produce a D. C. signal whose amplitude varies inaccordance with variations in the frequency of the input signal.

10. In a frequency discriminator circuit, a first phase shifting means having a first terminal and constructed to be responsive to an input signal applied thereto to produce a signal thereacross corresponding to the said input signal but whose phase varies in accordance with variations in the frequency of the input signal, a second phase shifting circuit comprising a series combination of a first resistor and an inductor having a first junction therebetween and arranged to be energized by the input signal, said second phase shifting circuit further comprising a series combination of a second resistor and a first capacitor having a second junction therebetween and arranged to be energized by the input signal, means for applying said input signal to the said first phase shifting means and the second phase shifting circuit, a series combination of a second capacitor and a first diode connected between said first junction and said first terminal of the said first phase shifting means, a series combination of a third capacitor and between said second junction and said first terminal of the said first phase shifting means, the anode of said first diode being connected to the cathode of said second diode, and means constructed to combine the signals appearing across said first and second diodes to produce a unilateral signal whose amplitude varies in accordance with variations of the frequency means and being connected between the first and second terminal means, an inductive circuit means having a second output means and being connected between the first and second terminal means, a thirdcircuit means comprising a tuned circuit connected between the said first and second terminal means, said tuned circuit having an output terminal, a first capacitor and first diode connected in series arrangement between said first output means and the output terminal of said tuned circuit, a second capacitor and a second diode connected in series arrangementbetween said second output means and the output terminal of said tuned circuit, the anode of one of said diodes being connected to the cathode of the other of 'said diodes, and resistive means connected across said first and second diodes and having an output tap therein, the said resistive means being designed to combine signals appearing across the first and second diodes and to produce at the tap" thereof a unilateral signal whose amplitude varies in accordance with variations in the frequency of the said input signal.

12. A frequency discriminator circuit in accordance with claim 11 in which said tuned circuit comprises a parallel tuned circuit.

13. A frequency discriminator circuit in accordance with claim 11 in which said tuned circuit comprises a series tuned circuit.

References Cited in the file of this patent UNITED STATES PATENTS 

